In high performance digital to analog converter (DAC) designs, manufacturers are continually striving to improve the dynamic range and noise performance while simultaneously increasing the bandwidth. However, due to nonlinear imperfections, DACs frequently produce out-of-band harmonic terms (e.g., second and third harmonics). Often, the worst harmonics are produced at higher signal frequencies. If the nonlinear distortion occurs in the DAC current sources prior to resampling in the DAC, the high frequency harmonics are aliased back in-band. These spurs are commonly referred to as folded harmonics, and are typically the most destructive spurious signals. As such, folded harmonics set a limit on the spurious free dynamic range of a DAC.
Thus, even though it is desirable in high performance DAC design to obtain both high modulation bandwidth and wide dynamic range, in a given DAC design, there is a limit on how high the sample clock frequency can be driven before the noise rises significantly along with the harmonic distortion. For example, the sample clock frequency in some conventional high performance DACs is approximately 1.25 GHz. In addition, it is difficult to deliver high amounts of digital data to a single DAC. Therefore, what is needed is a high performance DAC design that increases the output bandwidth without significantly degrading the analog performance.